- complete instruction set processor
- процессор с полным набором команд; процессор со сложным набором команд; CISC-процессор
Англо-русский словарь по вычислительной технике и информационным технологиям - 4-е изд.. Сергей Орлов .
Англо-русский словарь по вычислительной технике и информационным технологиям - 4-е изд.. Сергей Орлов .
Instruction set — An instruction set, or instruction set architecture (ISA), is the part of the computer architecture related to programming, including the native data types, instructions, registers, addressing modes, memory architecture, interrupt and exception… … Wikipedia
One instruction set computer — Computer science portal A one instruction set computer (OISC), sometimes called an ultimate reduced instruction set computer (URISC), is an abstract machine that uses only one instruction – obviating the need for a machine language opcode … Wikipedia
Reduced instruction set computer — The acronym RISC (pronounced risk ), for reduced instruction set computing, represents a CPU design strategy emphasizing the insight that simplified instructions which do less may still provide for higher performance if this simplicity can be… … Wikipedia
Burroughs large systems instruction set — The B5000 instruction set is the set of valid operations for the Burroughs large systems including the current (as of 2006) Unisys Clearpath/MCP systems. These unique machines have a distinctive design and instruction set. Each word of data is… … Wikipedia
Instruction level parallelism — (ILP) is a measure of how many of the operations in a computer program can be performed simultaneously. Consider the following program: 1. e = a + b 2. f = c + d 3. g = e * fOperation 3 depends on the results of operations 1 and 2, so it cannot… … Wikipedia
Instruction pipeline — Pipelining redirects here. For HTTP pipelining, see HTTP pipelining. Basic five stage pipeline in a RISC machine (IF = Instruction Fetch, ID = Instruction Decode, EX = Execute, MEM = Memory access, WB = Register write back). In the fourth clock… … Wikipedia
Very long instruction word — or VLIW refers to a CPU architecture designed to take advantage of instruction level parallelism (ILP). A processor that executes every instruction one after the other (i.e. a non pipelined scalar architecture) may use processor resources… … Wikipedia
Vector processor — A vector processor, or array processor, is a CPU design where the instruction set includes operations that can perform mathematical operations on multiple data elements simultaneously. This is in contrast to a scalar processor which handles one… … Wikipedia
Digital signal processor — A Digital Signal Processor chip found in a guitar effects unit. A digital signal processor (DSP) is a specialized microprocessor with an architecture optimized for the fast operational needs of digital signal processing.[1] … Wikipedia
Tensilica Instruction Extension — Tensilica Instruciton Extension refers to the language that is used to extend the Xtensa processor core instruction set. TIE in its syntax, is closer to the Hardware description language Verilog. TIE allows the user to extend the functionality… … Wikipedia
IBM PALM processor — The IBM PALM processor (Put All Logic in Microcode) was a board level 16 bit processor used in the IBM 5100 Portable Computer, a predecessor of the IBM PC. PALM was also used in the IBM 5110 and IBM 5120 followon machines. PALM was likely used in … Wikipedia